Photonics and electronics, two fields that were once distinct, appear to be converging.

The realms of optics and electricity are beginning to intersect at a deeper level, especially with the increasing focus on 3D-IC and AI/ML training in data centers, driving changes in chip design approaches and integration methods.

The root of this shift lies in the power consumption and performance demands of AI/ML. Nowadays, training a single model could potentially occupy multiple buildings in a data center. These performance demands, coupled with the explosive growth of data centers themselves—from standalone buildings to geographically distributed networks spanning multiple power grids, requiring dedicated fiber optic networks to handle vast bandwidth—call for innovation in the photonics industry.

To address the massive amounts of data and the ever-expanding network infrastructure, Ethernet speeds are rapidly increasing from the 800 Gb/s standard (approved by the IEEE P802.3df working group in February 2024) to the planned 1.6 Tb/s by 2026. At the same time, chip architects and engineering teams are striving to reduce system latency. But even that is not enough, which is why optical communication is suddenly receiving more attention.

Over a decade ago, it was predicted that optics would become crucial within data centers. "Now, there are those who are very pleased to see optics taking its rightful place in some large-scale applications—such as artificial intelligence/machine learning," says Tony Chan Carusone, Chief Technology Officer at Alphawave Semi. "We are all trying to predict which technologies will be widely adopted and where more customized solutions need to be developed."

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A primary area of focus is electro-optical switch technology. Optical devices are the best solution for long distances, and properly tuned electronic devices can reduce latency and impedance. The combination of the two in data center racks and clusters, using ASIC switches with electrical lines, extends from the entire board to the front panel, where pluggable optical components are inserted on the front panel to perform electro-optical conversion and its reverse operation. In the past, this was considered an efficient and elegant solution, but all these millimeters add up, making traditional system architectures unsustainable.

"There will come a time in the future when all your power consumption will be spent trying to efficiently transmit signals from point A to point B without any errors," says Ahsan Alam, Chief R&D Engineer at Ansys. "This is what is known as the 'power wall.' When all your power consumption is used to transmit signals from one chip to another, you have no remaining power to perform the actual computations in the CPU, GPU, or ASIC."CPO and LPO

The industry is seeking various methods to address the power wall issue. "One approach is co-packaging optical devices," said Priyank Shukla, Chief Product Manager of High-Speed SerDes IP Solutions at Synopsys. "Instead of performing electro-optical conversion (LPO) at the edge of the rack unit with limited surface area, it is better to introduce optical fibers directly into the chip packaging and perform the conversion there."

Nevertheless, the debate between pluggable devices and co-packaged optical devices (CPO) continues. On one hand, there are those who advocate for the traditional system that is simple, easy to implement, and has been running well, with long-established IEEE standards. On the other hand, there is a newer approach with recently approved standards that may enhance performance and reduce costs.

"Co-packaged optical architecture facilitates the integration of ASICs with optical engines on a common substrate, eliminating signal degradation caused by transmission to front-pluggable transceivers," said Manish Mehta, Vice President of Optical Systems Marketing and Operations at Broadcom. "Due to the simplified signal path on the CPO substrate, optical interconnect power consumption is reduced by 70% by removing the optical DSP and using CMOS electronic IC components in the optical engine."

In the meantime, linearly driven optical devices have emerged as a possible standalone option and a transition from pluggable optical devices to co-packaged optical devices, with ASICs rather than DSPs driving the optical devices. NVIDIA first proposed this idea at OIF in 2023, and since then, many variants have been introduced, hoping to create faster connections while reducing power consumption.

"NVIDIA CEO Jen-Hsun Huang pointed out in his GTC keynote that transmitting data via photons requires a transmitter on one side of the optical fiber and a receiver on the other," said Rich Goldman, Director of Strategic Partnerships at Ansys. "Huang spoke about eliminating transceivers and using copper cables directly." Despite the well-known advantages of photonics, this idea may also have some merit because transceivers require some work, and any work could slow down the speed and increase power consumption. This means we need to discuss from the chip all the way to the entire system, as they are all interconnected. We have been discussing this for a long time, and now we have achieved it."

As designs continue to evolve, the current optical interconnect options lie between traditional pluggable modules, CPO, and linearly driven pluggable optics (LPO), with LPO positioned in the middle. For those who are not yet ready to fully transition to CPO, the advantage of LPO lies in its familiar form factor and minimal loss.

"This is the new low-power interconnect," said Shukla of Synopsys. "Meta and other hyperscale network service providers have publicly requested linearly driven technology, where in electro-optical conversion, you can eliminate the intermediate retimer, so the electrical driver directly drives the optical component, which is how you save power in the signal chain's electro-optical conversion. But this also makes SerDes design more challenging."

LPOs are directly driven by switch SerDes without a retimer. Retimers were once valued for extending transmission distance by creating new signals; they regenerate signals but do not amplify noise, unlike repeaters, which amplify both signals and noise. However, their existence is now questioned because their function adds latency and consumes additional power.Infinera's Senior Vice President of Marketing, Rob Shore, stated: "Anything that requires a digital signal processor requires power consumption." "For data center operators, especially those trying to build artificial intelligence infrastructure, the main issue is power consumption. They want to allocate every watt of power to the servers and as little as possible to the optical equipment."

For proponents, LPO represents a well-considered compromise between functionality and familiarity. "With CPO, if you transition from traditional pluggable optical modules to a technology that looks very different in terms of implementation, there will inevitably be questions about reliability," said Alam from Ansys. "LPO will still have the same form factor as current pluggable devices. This is a strong motivation for people to choose this path over CPO, which would entail a fundamentally different change."

However, LPO also has its own limitations. "You cannot transmit data over very long distances," Alam explained. "Its transmission distance is much shorter than that of CPO. CPO will also offer more power consumption advantages in the future. In contrast, LPO, due to its modular structure, will provide superior maintainability. Ultimately, some groups will choose LPO, some will choose CPO, and others will opt for a combination of both. In some cases, such as with current pluggable transceivers and LPO, pluggable optical modules make sense, while in other cases, CPO makes sense. Both will continue to exist, and the market share will be divided between them."

From a design perspective, the challenges faced by CPO and LPO have a good overlap and should be primarily supported by current EDA tools, especially for LPO, as it is similar to current pluggable transceivers. Alam pointed out: "You can use the same solutions currently used for the design of LPO pluggable transceivers, and for CPO, there are multi-physics workflows to address emerging packaging challenges."

Thermal Issues

Although CPO technology promises to reduce power consumption, the design faces the challenge of thermal issues. However, the problem is not with the lasers.

"If you're concerned about thermal issues, the word 'laser' sounds scary," Alam said. "But for co-packaged optical technology and lasers inside and outside the chip, most people mount their optical engines and lasers on separate chips, then bring the lasers into the co-packaged optical device. The advantage of keeping the lasers separate is that it reduces the heat generated towards the switching system. Additionally, lasers are sensitive to temperature changes, so when you bring them into a 3D-IC, you need to consider the reliability of the lasers because there are issues like thermal crosstalk. Therefore, placing the lasers outside the chip is a simpler solution. That being said, there are already some solutions that integrate lasers into the co-packaged optical devices. Overall, whether using on-chip or off-chip lasers, it is necessary to perform thermal simulation on the entire co-packaged optical device to reduce thermal crosstalk, optimize system cooling, and lower operating temperatures to ensure performance and reliability."

Heat is a significant issue in photonics but does not exist in electrical ICs because it affects signal integrity. While the behavior of some components may be very sensitive to temperature changes, circuits typically have feedback loops that can adjust the voltage on the thermal tuner, thereby adjusting the device temperature and performance. However, some components that are sensitive to temperature changes do not have thermal tuning capabilities.Ansys' Goldman stated, "You have to be very mindful of heat and its impact on design." "We are using photonics more in data centers because copper heats up, whereas glass does not, and light carries more signals. You can achieve greater bandwidth, and the speed is the speed of light. It's better, faster, and cheaper."

In simple terms, it is not the lasers that generate additional heat, but rather the packaging structures.

"Co-packaging is a challenge for the entire industry," said Shukla. "You have to use co-packaging deployment to simulate performance. Everyone is trying to address this issue. Photonic chip providers, photonic wafer manufacturers are developing these processes to limit the thermal dissipation of their photonic components, laser modulators. EDA companies are developing processes that allow system designers to model temperature distributions so as to correctly model the performance of optical components. For example, if the performance of a laser changes with increasing temperature, we need tools to effectively simulate this change and take digital measures to compensate for the performance degradation. This is the complex problem that EDA tools and designers are solving, while SerDes designers reduce power consumption from the electrical side."

However, unlike electronics, in some photonic circuits, precisely controlled heat is used to modulate the lasers, and as the heat increases, the wavelength changes. But this characteristic could make thermal overload a more concerning issue.

"Many structures will have built-in heaters to modulate the resonance and filtering capabilities of their waveguides," said Chris Mueth, a business development, marketing, and technical expert at Keysight. "It requires a feedback loop. If you want to tune to a specific wavelength, you need to control this. When you start integrating into 3D-ICs, the chips themselves heat up, and the problem becomes more complex."

The situation is complex, but not hopeless. "You need to consider control loops to deal with this issue. It's not an insurmountable problem," Mueth said. "This is one of the many multidisciplinary characteristics you have to deal with when you're integrating 3D-ICs and photonics, as well as all these different technologies with physical effects."

After decades of demonstration and discussion, the two once separate fields of photonics and electronics seem to be converging.

"Whether it's co-packaged optics, pluggable optics, or monolithic integration, photonics is getting closer to electronics in a wide range of applications, including data center optics and high-performance computing," said Jigesh Patel, head of product marketing for Synopsys' EDA team. "This trend requires a paradigm shift in design innovation—from SoC to a system-on-chip approach, where the collaborative design and co-optimization of multiple technologies in a common electronic photonic design automation environment are key to commercial success."